1. Field of the Invention
The present invention relates, in general, to a method for fabricating a semiconductor device and, more particularly, to a method for forming field regions in a semiconductor device, capable of minimizing redistribution of channel stop ions in a monosilicon substrate as well as restraining stresses in the monosilicon substrate, thereby improving insulation characteristics of the field regions in transistors and the like.
2. Description of the Prior Art
A local silicon oxidation process (hereinafter referred to as "LOCOS") has been used extensively to insulate active regions of silicon substrate from each other. In the LOCOS process, a field oxide film is formed in a field region of a silicon substrate.
To implement the LOCOS process, a pad oxide film is first formed entirely over a monosilicon substrate, followed by formation of a nitride film over a portion of the pad oxide film which is disposed over an active region of the monosilicon substrate. Then, the monosilicon substrate is subjected to thermal treatment in an oxidative atmosphere, to form a field oxide film selectively on a field region of the monosilicon substrate with the nitride film serving as a mask.
In an integrated circuit fabricated with use of the LOCOS process, a field transistor is formed between active regions of an n.sup.+ diffusion layer formed on a p type monosilicon substrate, that is, an N-field transistor is parasitically generated.
More specifically, in implementing the LOCOS process, a pad oxide film and a nitride film are successively formed entirely over a p type monosilicon substrate, and all of the nitride film except one area on the pad oxide film of an n.sup.+ diffusion layer of the monosilicon substrate is removed. The remaining nitride film is used as a mask as boron ions, p type impurities, are implanted into a field region of the monosilicon substrate, to use them as channel stop doping ions. Thereafter, a self-align doping process is performed under an oxidative atmosphere, i.e., the monosilicon substrate is selectively subjected to thermal treatment to form a field oxide film on the field region of the monosilicon substrate. A parasitical N-field transistor is thus formed with active regions of the n.sup.+ diffusion layer and an ion-implanted channel stop region disposed between these active regions.
However, during formation of the field oxide film, a segregation phenomenon is generated such that the boron ions implanted into the monosilicon substrate move to the interior of the field oxide film. This segregation phenomenon, after completion of the formation of the field oxide film, causes the density of boron ions to be reduced at the interface between the filed oxide film and the monosilicon substrate. The reduction in the density of the boron ions results in lowering the threshold voltage of the parasitical field transistor.
Generally, in an integrated circuit fabricated with the LOCOS process, a bird's beak phenomenon is generated at a boundary between the field region and the active region, reducing a substantial area of the active region through its encroachment upon the active region.
In addition, while the field oxide film is formed, lateral diffusion of the channel stop ions occurs to reduce the effective area of the active regions, giving rise to increasing junction capacitance with the diffusion layer of the active regions as well as junction leakage current. Therefore, the LOCOS process creates difficulty in raising the degree of integration of a semiconductor device.
Further, the thickness of the field oxide film is dependent upon a pattern size of an isolation region. Thus, although a field oxide film covering the isolation region having a small pattern size and another field oxide film covering the isolation region having a large pattern size are formed under the same oxidative condition, the former becomes thicker than the latter. The difference between their thicknesses is apparently caused by stress focused into an edge portion of the pattern of the isolation region.
When executing through-field ion implantation, boron ions for channel stop implanted through the thin field oxide film are present in the monosilicon substrate more deeply than those implanted through the thick field oxide film. Accordingly, it is difficult to complement the density of channel stop ions in the interface between the field oxide film and the silicon substrate, which causes a semiconductor device to exhibit instability of the insulation property.
To effectively correspond with high integration of semiconductor device, there are suggested new methods for improving insulation property of a field region with small pattern size.
A trench isolation method is one of these new methods wherein a trench is formed in a field region of a monosilicon substrate to increase the effective length of a channel with the aim of improving an insulation property of an isolation region. The trench isolation method comprises subjecting the field region of the monosilicon substrate to anisotropic dry etch, to form a trench in the field region, filling a polysilicon layer in the trench, and oxidizing the polysilicon layer. This method further comprises depositing an insulation layer on the surface of the trench in advance of the filling step.
In order to provides a better understanding of the background of the present invention, the trench isolation method and its problems will be described in greater detail.
Referring to FIGS. 1A through 1D, a conventional, prior art trench isolation method is illustrated.
As shown in FIG. 1A, a monosilicon substrate 1 has trenches 2 with different pattern sizes. For this, a first oxide film (not shown) is first formed entirely over the monosilicon substrate 1 and a typical photo etch process is carried out in such a way that the first oxide film is left over active regions, but removed over field regions with different pattern sizes, so as to expose areas of the monosilicon substrate 1 of the field regions. With the oxide film left in the active regions used as a mask, the monosilicon substrate 1 is subjected to an anisotropic dry etch to take off the monosilicon substrate in a predetermined thickness. As a result, trenches 2 having different pattern sizes but the same depth are formed in field regions of the monosilicon substrate 1. Thereafter, the first oxide film is eliminated.
As shown in FIG. 1B, a pad oxide film 3 and a nitride film 4 are successively deposited entirely over the monosilicon substrate 1 by chemical vapor deposition processes. The nitride film 4 deposited over the field regions is next removed by usual photo etching. As a result, the nitride film 4 is left only over the active regions of the monosilicon substrate 1.
Subsequently, a second oxide film 5 is deposited over the resulting structure with a thickness sufficient to fill the trench 2 having a small pattern size. The surface of the second oxide film 5 over the trench 2 having a small pattern is flat, whereas the surface of the second oxide film 5 over the trench having a large pattern is recessed. Next, using usual photo-technology, a first photosensitive film 6 is patterned only on the recessed surface of the second oxide film 5 which is present above the trench 2 having a large pattern size.
As shown in FIG. 1C, the second oxide film 5 is subjected to etch back, with the first photosensitive film 6 functioning as a mask, until the surface of the nitride film 4 is exposed. As a result, the trench 2 having a small pattern size is filled by the second oxide film 5, whereas the trench 2 having a large pattern size is, in part, filled by the second oxide film 5. After completion of the etch back, the first photosensitive film 6 is eliminated.
As shown in FIG. 1D, a third oxide film 7 is deposited over the resulting structure by a chemical vapor deposition process the moment the empty space between remaining segments of the second oxide film 5 in the trench 2 having a large pattern size causes the surface of the third oxide film 7 to have a cusp 8. A second photosensitive film 9 is coated on the third oxide film 7 with the aim of planarizing the cusp 8 of the third oxide film 7.
As shown in FIG. 1E, the second photosensitive film 9 and the third oxide film 7 are subjected to etch back at the same time, to take off the second photosensitive film 9 completely and the third oxide film 7 partially, followed by removal of the nitride film 4 left above the active regions. Until the surface of the monosilicon substrate 1 is exposed, the pad oxide film 3 is etched along with a part of the first and second oxide films 5, 7. As a result, the active regions and the field regions of the monosilicon substrate 1 become substantially flat.
However, the conventional trench isolation method has a problem that the oxide film filling the trenches by chemical vapor deposition process is inferior to a thermal oxide film with respect to insulation properties. In addition, the conventional trench method is also problematic in that, as the channel stop ions are redistributed between the monosilicon substrate and the field region, depletion of the channel stop ions occurs, deleteriously affecting the insulation property of the field transistor. Hence, the field regions with a small pattern size become poor in insulation property.
Furthermore, the conventional trench insulation method has other disadvantages including lattice damage of the monosilicon substrate resulting from the formation of the trenches, redistribution of channel stop ions resulting from the oxidation of the polysilicon layer, and heterogenous filling of the trench due to the different pattern sizes in the isolation regions.